“The PDN has three basic components: resistance, inductance, and capacitance. The goal is to use these components in the most
effective way to help reduce the overall impedance of the PDN.”
Providing power to field-programmable gate arrays (FPGAs) that are running a multi-gigabit serializer/deserializer while drawing 100 amps of core voltage, such as state-of-the-art FPGAs from Xilinx and Intel/Altera, is becoming a serious challenge for power architects and engineers. High dynamic currents demanded by processors and FPGAs can cause significant voltage deviations on the core rails. Careful design of the power distribution network (PDN) can mitigate these problems.
The PDN has three basic components: resistance, inductance, and capacitance. The goal is to use these components in the most effective way to help reduce the overall impedance of the PDN. How you do that is largely dictated by physics. The impedance curve is a summation of the effects of the power source you choose, the bulk capacitors, high-frequency capacitors, the printed circuit board (PCB), the integrated circuit (IC) package, and the die inside the IC package. Component relationships can be tricky. Simulation software helps reduce board spins by simulating all aspects of the boards, power density, voltage drops, plane impedance, signal integrity, and other things. Simulation is expensive, however, so its use often depends on the type of product you are designing.
This is an excerpt from 7 Experts on New Approaches for Power Distribution
Network Design. The eBook was generously sponsored by KEMET Corporation and Mouser Electronics.