“The challenge is how to build low-impedance PDNs that deliver more power with improved efficiency and
take up less room on the printed circuit board.”
The purpose of a power distribution network (PDN) is to provide power to a system driven by an application-specific integrated circuit (ASIC), CPU or field-programmable gate array (FPGA) without degrading signal integrity. As power devices become smaller while load devices need more power, power devices require greater power density. Low-impedance PDNs usually require more decoupling capacitors with increased board area and cost. The challenge is how to build low-impedance PDNs
that deliver more power with improved efficiency and take up less room on the printed circuit board (PCB). Several PDN design and technology trends help address these challenges:
• Output capacitor choices. A low-impedance PDN requires using capacitors that minimize impedance to minimize the power supply’s transient response ripple to load changes. Larger capacitors provide the energy to handle low-frequency transient response. Smaller capacitors with lower parasitic resistance (ESR) and inductance (ESL) are able to lower PDN impedance at higher frequencies even
beyond the supply loop bandwidth. To meet the minimum impedance target for a PDN, engineers place a combination of capacitor sizes in parallel, creating a capacitor network that delivers low or flat impedance over a wide frequency range.
This is an excerpt from 7 Experts on New Approaches for Power Distribution
Network Design. The eBook was generously sponsored by KEMET Corporation and Mouser Electronics.